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rev. 0.3 2/14 copyright ? 2014 by silicon laboratories c8051f850-dk-ug c8051f850-dk-ug udp c8051f850 mcu c ard u ser ? s g uide for c8051f85 x /86 x mcu s 1. introduction the unified development platform (udp) provides a development an d demonstration platform for silicon laboratories microcontrollers , short-range wireless device s, and software tools, incl uding the silicon laboratories integrated development environment (ide). figure 1. unified development platform block diagram
c8051f850-dk-ug 2 rev. 0.3 2. relevant documents this document provides a hardware overview for the un ified development platform (udp) system c8051f85x/86x mcu card. additional information on the udp system and the silicon labs 8-bit mc us can be found in the documents listed in this section. 2.1. motherboard user?s guide the udp motherboard user?s guide contains informat ion on the motherboard features and can be found at www.silabs.com/udp . 2.2. card user?s guides the udp mcu, i/o, and radio test card user?s guides can be found at www.silabs.com/udp . 2.3. application notes all 8-bit application notes can be found at www.silabs.com/8bit-appnotes .
c8051f850-dk-ug rev. 0.3 3 3. hardware setup 3.1. using the mcu card alone refer to figure 2 for a diagram of the hardware co nfiguration when using the mcu card without a udp motherboard. 1. connect the usb debug adapter to the 10-pin d ebug connector (j23) on the mcu card using the 10-pin ribbon cable. 2. connect the usb debug adapter to a usb port on the pc. 3. move the sw1 vdd select switch to the top +3.3v_vreg position. 4. verify that the jp2 imeasure jumper is populated. 5. power the mcu card through the power connector (j6) using the supplied 9 v ac/dc adapter. notes: ?? use the reset button in the ide to reset the target when connected using a usb debug adapter. ?? remove power from the mcu card and the usb debug adapter before connecting or disconnecting the ribbon cable from the mcu card. connecting or discon necting the cable when the devices have power can damage the device and/or the usb debug adapter. figure 2. hardware setup using the mcu card alone 1 2 3 4 5
c8051f850-dk-ug 4 rev. 0.3 3.2. using the mcu card with the udp motherboard refer to figure 3 for a diagram of the hardware configuration when using the mcu card with a udp motherboard. 1. connect the mcu card to the udp motherboard slot. 2. (optional) connect an i/o card to the udp motherboard slot. 3. (optional) connect a radio test card to th e radio test card slot in the udp motherboard. 4. (optional) connect an ezlink card to the ezlink card slot in the udp motherboard. 5. connect the usb debug adapter to the 10-pin d ebug connector (j23) on the mcu card using the 10-pin ribbon cable. 6. connect the usb debug adapter to a usb port on the pc. 7. move the sw1 vdd sele ct switch to the lower mb position. 8. verify that the jp2 imeasure jumper is populated. 9. connect the ac/dc power adapter to power jack j20 on the udp motherboard. the board can also be powered from the j16 usb, j1 mini usb co nnectors, or j11 battery connector socket. 10. move the s3 power switch on the udp motherboard to the on position. 11. update the motherboard firmware as described in section 3.3. notes: ?? use the reset button in the ide to reset the target when connected using a usb debug adapter. ?? remove power from the target board and the usb debug adapter before connecting or disconnecting the ribbon cable from the target board. connecting or disconnecting the cable when the devices have power can damage the device and/or the usb debug adapter. ?? the mcu card can be used alone without the motherboard. however, the motherboard must be powered if an mcu card is connected. figure 3. hardware setup using the unified development platform usb debug adapter power adapter (j20) usb connector (j16) power select switch imeasure jumper virtual com port
c8051f850-dk-ug rev. 0.3 5 3.3. updating the ud p motherboard firmware to ensure the udp motherboard supports the c8051f85x/86x mcu card, run the udp motherboard firmware update utility shown in figure 4. th is utility can be downloaded from www.silabs.com/udp . 1. connect the udp motherboard to a pc using a regular usb cable connected to the uds connector (j16). 2. run the utility. 3. select the desired motherboard if mo re than one is connected to the pc. 4. press the update selected device button. figure 4. udp motherboard firmware update utility
c8051f850-dk-ug 6 rev. 0.3 4. software setup simplicity studio greatly reduces de velopment time and complexity with silicon labs efm32 and 8051 mcu products by providing a high-powered ide, tools for hard ware configuration, and links to helpful resources, all in one place. once simplicity studio is installed, the application itself can be used to install additional software and documentation components to aid in the development and evaluation process. figure 5. simplicity studio the following simplicity studio components are required for the c8051f850 development kit: ?? 8051 products part support ?? simplicity developer platform download and install si mplicity studio from www.silabs.com/8bit-software or www.silabs.com/simplicity-studio . once installed, run simplic ity studio by selecting start ? silicon labs ? simplicity studio ? simplicity studio from the start menu or clicking the simplicity studio shortcut on the desktop. follow the instructions to install the software and click simplicity ide to launch the ide. the first time the project creation wizard runs, the setup environment wizard will guide the user through the process of configuring the build tools and sdk selection. in the part selection step of the wizard, select from the list of installed parts only the parts to use during development. choosing parts and familie s in this step affects the displayed or filtered parts in the later device selection menus. choose the c8051f85x family by checking the c8051f85x/86x check box. modify the part selection at any time by accessing the part management dialog from the window ? preferences ? simplicity studio ? part management menu item. simplicity studio can detect if certain toolchains are not activated. if the licensing helper is displayed after completing the setup environment wizard, follow the instructions to activate the toolchain.
c8051f850-dk-ug rev. 0.3 7 4.1. running blinky each project has its own source files, target configuration, sdk configuration, and build configurations such as the debug and release build configurations. the ide can be used to ma nage multiple projects in a collection called a workspace. workspace settings are applied globally to a ll projects within the workspace. this can include settings such as key bindings, window preferences, and code style and formatting options. project actions, such as build and debug are context sensitive. for example, the user must select a project in the project explorer view in order to build that project. to create a project based on the blinky example: 1. click the simplicity ide tile from the simplicity studio home screen. 2. click the create new project link from the welcome screen or go to file ? new ? silicon labs mcu project . 3. in the kit drop-down, select c8051f850 development kit , in the part drop-down, select c8051f850 , and in the sdk drop-down, select the desired sdk. click next . 4. select example and click next . 5. under c8051f850 development kit in the blinky folder, select f85x-86x blinky and click finish . 6. click on the project in the project explorer and click build , the hammer icon in the top bar. alternatively, go to project ? build project . 7. click debug to download the project to the hardware and start a debug session. 8. press the resume button to start the code running. the led should blink. 9. press the suspend button to stop the code. 10. press the reset the device button to reset the target mcu. 11. press the disconnect button to return to t he development perspective. 4.2. simplicity studio help simplicity studio includes detailed he lp information and device documentat ion within the tool. the help contains descriptions for each dialog window. to view the document ation for a dialog, click the question mark icon in the window: this will open a pane specific to the dialog with additional details. the documentation within the tool can also be viewed by going to help ? help contents or help ? search .
c8051f850-dk-ug 8 rev. 0.3 4.3. simplicity configurator the simplicity configurator is a conf iguration and c ode generation tool. this utility helps ac celerate development by automatically generating initialization source code to configure and enable the on-chip resources needed by most design projects. in just a few st eps, the wizard creates complete startu p code for a specific silicon labs mcu. to create a new simplicity configurator project: 1. click the create new project link from the welcome screen or go to file ? new ? silicon labs mcu project . 2. in the kit drop-down, select c8051f850 development kit or none , in the part drop-down, select c8051f850 , and in the sdk drop-down, select the desired sdk. click next . 3. select simplicity configurator program and click next . 4. fill in the project name and select the desired device. the c8051f850-c-gu-qsop device is on the c8051f850 target board. click finish. the simplicity configurator project displays properties fo r each peripheral. to configure a peripheral, click on the defaultmode peripherals tab at the bottom and cli ck on a peripheral. checking t he box for a peripheral will add it to code generation. once a peripheral is selected, configure the registers using the properties view. select a new value for a property with either an input box or a drop-down menu and press enter to set it. figure 6. simplicity configurator ? configuring peripheral properties
c8051f850-dk-ug rev. 0.3 9 to configure pins, click on the defaultmode port i/o tab at the bottom of main window. clicking on a pin brings up a property window for the pin. clicking anywhere else in the main window opens a property window for the crossbar. select multiple pins with ctrl + left click or mouse dragging over the desired set of pins. the package diagram displays the configured peripherals on the pins, including non-crossbar signals (i.e. adc inputs). code generation updates every time the configuration pr oject saves. after configuring the device, add any non- initialization code, build, and debug the same as with any other project. more information on simplicity configurator can be found in an0823: simplicity configurator user?s guide and an0821: simplicity studio c8051f85x walkthrough . application notes can be found on www.silabs.com/8bit- appnotes . figure 7. simplicity configurator ? configuring port i/o
c8051f850-dk-ug 10 rev. 0.3 4.4. legacy 8-bit ide note: using the simplicity studio tools with the c8051f850 deve lopment kit is recommended. see section 4. "software setup?" on page 6 for more information. download the 8-bit softwa re from the website ( www.silabs.com/8bit-software ) or use the provided installer on the cd-rom to install the software tools for the c8051f85x/86x devices. after installation, examples can be found in ...\examples\c8051f85x_86x in the installation directory. at a minimum, the c8051f850 dk requires: ?? silicon labs ide ?software enabling initial evaluation, development, and debugging. ?? configuration wizard 2 ?initialization code generation soft ware for the c8051f85x/86x devices. ?? keil c51 tools ?keil 8051 compiler/assembler/linker toolchain. ?? cp210x drivers ?virtual com port (vcp) drivers for the cp210x com interface. more information on this installation process can be found in section 4.5. other software available includes: ?? keil vision driver ?driver for the keil vision ide that enables development and debugging on c8051fxxx mcus. ?? flash programming utilities and mcu production programmer ?programming utilities for the production line. more information on the availabl e programming options can be found on the website: http://www.silabs.com/products/mcu/pages/programmingoptions.aspx . ?? toolstick development tools ?software and examples for the toolstick development platform. more information on this platform can be found at www.silabs.com/toolstick . the development kit includes the latest version of the c51 ke il 8051 toolset. this toolset is initially limited to a code size of 2 kb and programs start at code address 0x0800. af ter registration, the code si ze limit is removed entirely and programs will start at code address 0x0000. to register the keil toolset: 1. find the product serial number printed on the cd-rom. if you no longer have this serial number, register on the silic on labs website ( www.silabs.com/8bit-software ) to obtain the serial number. 2. open the keil vision4 ide from the insta llation directory with administrative privileges. 3. select file ? license management to open the license management window. figure 8. keil vision4 ide license management window 4. click on the get lic via internet... button to open the obtaining a license ide code (lic) window. 5. press ok to open a browser window to the keil webs ite. if the window does n?t open, navigate to
c8051f850-dk-ug rev. 0.3 11 www.keil.com/license/install.htm . 6. enter the silicon labs product serial number printed on the cd-rom, alon g with any additional required information. 7. once the form is complete, click the submit button. an email will be sent to the provided email address with the license activation code. 8. copy the license id code (lic) from the email. 9. paste the lic into the new license id code (lic) text box at the bottom of the license management window in vision4. 10. press the add lic button. the window should now list the pk51 prof. developers kit for silabs as a licensed product. 11. click the close button. 4.5. cp210x usb to uart vcp driver installation the mcu card includes a silicon labs cp210x usb-to-u art bridge controller. devi ce drivers for the cp210x need to be installed before the pc software can communi cate with the mcu through the uart interface. use the drivers included cd-rom or download t he latest drivers from the website ( www.silabs.com/interface-software ). 1. if using the cd-rom, the cp210x drivers option will launch the appropriate dr iver installer. if downloading the driver package from the website, unzip the files to a location and run the appropriate installer for the system (x86 or x64). 2. accept the license agree ment and follow the steps to install the dr iver on the system. the installer will let you know when your system is up to da te. the driver files includ ed in this installation have been certified by microsoft. 3. to complete the installation process, connect t he included usb cable between the host computer and the com port usb connector (j5) on the mcu card. windows w ill automatically finish th e driver installation. information windows will pop up from the ta skbar to show the installation progress. ?? if needed, the driver files can be uninstalled by selecting windows driver package?silicon laboratories... option in the programs and features window.
c8051f850-dk-ug 12 rev. 0.3 5. c8051f85x/86x mcu card overview the c8051f850 mcu card enables application developm ent on the c8051f85x/86x mcu device family. the card connects to the mcu card expansion slot on the udp motherboard and provides complete access to the mcu resources. each expansion board has a unique id that can be read out of an eeprom or mcu on the board, which enables software tools to recognize the connected hardware and automatically select the appropriate firmware image. the target mcu card can also be detached from the udp and used alone as a development or demonstration tool. figure 9 and figure 10 highlight the c8051f850 mcu card features. figure 9. c8051f850 mcu card features?front potentiometer analog terminals push-button switches mini-b usb connector for vcp power debug connector prototyping area reset push-button leds vcp-enabled led vdd select switch and power led current measure jumper port access voltage and ground reference access
c8051f850-dk-ug rev. 0.3 13 figure 10. c8051f850 mcu card features?back electronic board id (ebid) virtual com port port pin isolation resistors
c8051f850-dk-ug 14 rev. 0.3 5.1. push-button switches and leds (s1-2, ds5-6) the udp c8051f850 mcu card has two push-button switch es and two leds. the two leds connect to p1.0 and p1.1, and the two switches connect to p1.7 and p2.1. the switches are normally open and pull the pin voltage to ground when pressed. the leds connect to vdd through a current-limiting resistor and turn on when the corresponding port pin is low. the header j27 can be used to disconnect th e switches and leds from the gpio pins. 5.2. analog terminals (j34) several of the c8051f850 port pins used for analog functi ons are connected to the j34 terminal block. refer to table 2 for the j34 terminal block connections. 5.3. potentiometer (r13) the potentiometer is available on p1.2 (adc0.10). to use the potentiometer, install a shorting block on j27 pins 9 and 10 to connect p1.2 to the potentiometer. 5.4. voltage and ground reference (j32) the c8051f850 has options to use an external voltage reference on the p0.0 / vref pin and an external analog ground reference on the p0.1 / agnd pin. the j32 header allows an external supply to clip to pin 1 for agnd and pin 2 for vref. these signals can then be connected to the mcu by populating a shorting block between pins 3 and 5 for agnd and pins 4 and 6 for vr ef. populating this shorting block for vref connects p0.0 to the required capacitors for the external reference. table 1. switch and led pin descriptions mcu pin function pb1.0 red led ds5 (led1) pb1.1 red led ds6 (led2) pb1.7 switch s1 pb2.1 switch s2 table 2. terminal block pin descriptions (j34) terminal pin mcu i/o 1 vref / p0.0 2gnd 3 adc0.9 / p1.1 4 adc0.12 / p1.4 5 adc0.10 / p1.2 6 adc0.13 / p1.5 table 3. terminal block pin descriptions (j25) mcu pin analog signal description p0.0 vref clip external source to j32 pin 2, apply shorting block between pins 4 and 6 to connect to the mcu p0.1 agnd clip external ground to j32 pin 1, apply shorting block between pins 3 and 5 to connect to the mcu
c8051f850-dk-ug rev. 0.3 15 5.5. vdd power se lect switch (sw1) the vdd power supply has two power options: udp motherboard (pwr_vdd_out) and on-board +3.3 v regulator power. the vdd power select switch is used to select between the two op tions. the +3.3 v regulator power option is the upper +3.3_vreg position and allows the board to be powered from a diode-or of four power sources: 9 v power adapter (j6), the usb connector labeled com port (j5), the usb debug adapter (j23), or from the udp motherboard bulk supply (pwr_5.0v_bulk). 5.6. power led (ds9) the blue power led provides visual fe edback when the board is powered thr ough usb, the 9 v power adapter, the usb debug adapter, or from the udp motherboard. the power led indicates that power is available on the board and the vdd power select switch must be configured properly to power the mcu. 5.7. imeasure jumper (jp2) the imeasure jumper (jp2) allows for easy access to me asure the vdd current of the mcu. the shorting block for this header is populated by default, and the direction of current is shown wit h a silk screen arrow. to measure the supply current, remove the corresponding shorting blo ck and connect a current measurement device across the unpopulated header. the voltage supply prior to the imeasure jumper is t he vdd pre-measure (vdd_pm) net, which supplies all of the external leds, switches, usb com, and rese t pull-up. the vdd after the imeasure jumper only connects to the mcu. 5.8. debug header (j23) the shrouded 10-pin d ebug header supports the silicon labs usb debug adapter. th is connector provides a c2 debug connection to the c8051f85x/86x on the mcu card. 5.9. reset button (s5) the reset push-but ton switch is just below the d ebug header (j23 ). pushing this button will always reset the mcu. note that pushing this button while th e ide is connected to the mcu will resu lt in the ide disc onnecting from the target. 5.10. uart connection op tions (j7, u2, u4, u5) the mcu card features a usb virtual com port (vcp ) uart connection via the mini-b usb connector (j5) labeled com port . the vcp connection uses the cp210x usb- to-uart bridge chip (u2). the gpio pins connected to the cp210x device can be enabled or disabl ed through the j7 header. table 4 shows the gpio pins that are routed to the cp210x. in addition to the cp210x usb-to -uart connection, the mcu card can connect the c8051f850 uart signals with the udp motherboard uart si gnals uart_tx_sys and uart_rx_sys using u5. the si gnals to switch between the two interfaces are uart_vcp_en and uart _sys_en and are controlled by the motherboard. the default selection with or without the motherboard is the cp210x vcp interface using a pull-down resistor r20. 5.11. port pin h eaders (j24, j24, j26) all of the mcu port pins are available on the 0.100-inch headers on mcu card. each connector provides connections to each port, vdd, and ground. any unused pi ns on the p2 header are not connected. some of these port pins are shared with other functions on the board and may be modified as explained in section 5.13. table 4. cp210x controlled gpio pins mcu pin com function p0.4 uart transmit p0.5 uart receive vdd com vio
c8051f850-dk-ug 16 rev. 0.3 5.12. electronic boar d id (ebid) (u1, j35) the mcu card has a unique id that can be read out from the silicon labs c8051f990 mcu (u1). this mcu enables software tools to recognize the connected hard ware and automatically select the appropriate firmware image. the ebid device uses two i 2 c signals to communicate: udpbus_sda_ a and udpbus_scl_a. these signals are connected to p0.6 and p0.7 on the c8051f850 mcu through the j25 header. these signals can be disconnected from the mcu during power measurements. 5.13. mcu port pin connections the mcu card has many udp connections for use with different i/o cards and t he udp motherboard. table 6 describes all functions connected to each pin on the c 8051f850 mcu. all of the udp connections are made with populated 0 ? ohm resistors on the back of the mcu card. to disconnect a signal from the pin, remove the 0 ? resistor. table 5. terminal block pin descriptions (j25) mcu pin ebid / udp signal p0.6 udpbus_sda_a p0.7 udpbus_scl_a table 6. mcu card and udp pin functions mcu pin mcu card function or udp signal p0.0 vref spi_sck_ezr adc_vref gpio05 p0.1 agnd spi_miso_ezr adc_vr efgnd gpio06 epca_ch1_motor p0.2 ext_int0 spi_mosi_ezr cp_pos_a p0.3 ext_int1 spi_nss0_ezr cp_neg_a p0.4 uart_tx_sys uart_tx_a p0.5 uart_rx_sys uart_rx_a wakeup0 p0.6 udpbus_sda_a uart_rts_sys uart_r ts_a i2c_sda_ezr epca_ch3_motor p0.7 udpbus_scl_a uart_cts_sys uart _cts_a i2c_scl_ezr epca_ch5_motor p1.0 led1 adc_in0 cp_out_a p1.1 led2 adc0.9 adc_in1 cp_outa_a p1.2 potentiometer adc0.10 adc_in2 clkout0 p1.3 pca_ch0_a adc_in3 p1.4 adc0.12 pca_ch1_a gpio02 epca_ch0_motor p1.5 adc0.13 pca_ch0_b wakeup1 gpio03 epca_ch2_motor p1.6 pca_eci_a timer_ct_a gpio04 epca_ch4_motor p1.7 switch s1 timer_ct_b gpio01 p2.0 c2d p2.1 switch s2 gpio00
c8051f850-dk-ug rev. 0.3 17 6. using the c8051f850 mcu ca rd with the udp motherboard 6.1. mcu card header connections the mcu card has four connectors with 100 pins each. th ese 400 pins are directly ti ed to the udp motherboard and i/o cards. these signals are named and designed to support a wide variety of fe atures and applications, and the c8051f850 mcu card implements a subset of these connections. the mcu cards and i/o cards are designed so that a ma ximum number of functions are shared between each card. this allows a particular type of i/o card to be shared amongst a ll mcu cards that connect to the same signals. the mcu card slot includes the following components: j1 mcu card connector h1 j2 mcu card connector h2 j3 mcu card connector h3 j4 mcu card connector h4 the c8051f850 mcu card implements the signals described in table 8, table 9, table 10, and table 11 in the appendix. 6.2. shorting blo cks: factory defaults the c8051f850 mcu card comes from the factory with pre-installed shorting blocks on several headers. figure 11 shows the positions of the factory default shorting blocks. figure 11. shorting blocks: factory defaults a shorting block is installed across the jp2 imeasure header to enable power to the mcu. shorting blocks are installed on j7 to enable the virtual com port. shorting blocks are also installed on j27 to enable the switches, leds, and potentiometer to be connected to gpio pins.
c8051f850-dk-ug 18 rev. 0.3 7. power measurement the c8051f850 mcu card includes a jp2 imeasure jumper for mcu power measurement purposes. the vdd supply on pin 2 of the header connects only to the mcu on the board. the vdd pre-measure (vdd_pm) supply on pin 1 of the jp2 header powers the external leds, switches, reset switch, potentiometer, and vcp com. 7.1. measuring power with fixed vdd to measure the power of the c8051f850 m cu using the mcu card at a fixed 3.3 v: 1. connect a usb debug adapter to the 10-pin shrouded debug connector (j23). 2. remove the three sh orting blocks from j7. 3. remove the jp2 imeasure shorting block. 4. connect a multimeter across (positive side on the left pin, current flow indicated by the silk screen arrow). 5. move the vdd select switch (sw2) to the upper +3.3v_vreg position. 6. connect the 9 v power adapter to power (j6). 7. download the code to the board. 8. remove the debug adapter connection. 9. measure the power of the device. figure 12. c8051f850 mcu card power measurement configuration? fixed vdd +000.500 adc usb debug adapter 1 2 3 5 8 4 6
c8051f850-dk-ug rev. 0.3 19 7.2. measuring power with varying vdd to measure power with a varying vdd: 1. connect a usb debug adapter to the 10-pin shrouded debug connector (j23). 2. remove the three sh orting blocks from j7. 3. remove the jp2 imeasure shorting block. 4. connect a multimeter across the jp2 imeasure jumper (positive side on the left pin, current flow indicated by the silk screen arrow). 5. move the vdd select switch (sw2) to the lower mb position. 6. connect the negative terminal of a bench power supply to board ground. 7. connect the positive terminal of a bench power supply to the positive side (left pin) of the imeasure jumper. this will ensure that the /rst pin pull-up is powered. note: the pull-up resistor on /rst is powered by the vdd pre -measure (vdd_pm) net, which is separated from the vdd net with the imeasure shorting block (jp2) removed. powering the mc u using vdd without powering the vdd_pm net will prevent the ide from comm unicating with the mcu. 8. download the code to the board. 9. remove the debug adapter connection. 10. measure the power of the device. figure 13. c8051f850 mcu card power measurement configuration?varying vdd 8. known board issues there are no known issues with revision 200 of the c8051f850 mcu card. +000.500 adc 2.8 v usb debug adapter 1 2 3 5 9 6 4 7
c8051f850-dk-ug 20 rev. 0.3 9. schematics 5 4 3 2 1 debug interface port access udp configuration vdd_pm vdd debug_5.0v vdd_pm vdd_pm p0.0 p0.2 p0.4 p0.6 p0.1 p0.3 p0.5 p0.7 p0.2 p0.1 p0.0 c2ck p0.5 p0.3 p0.4 p0.6 p0.7 p1.0 p1.1 p1.2 p1.3 p1.4 p0.0 p0.1 c2d p1.7 p1.6 p1.5 p2.1 c2ck /rst c2d p2.0 p1.0 p1.2 p1.4 p1.6 p1.1 p1.3 p1.5 p1.7 p2.0 p2.1 gpio05 spi_sck_ezr adc_vref gpio06 spi_miso_ezr adc_vrefgnd spi_mosi_ezr ext_int0 p0.2 spi_nss0_ezr ext_int1 p0.3 uart_tx_a p0.4 uart_rx_a p0.5 wakeup0 p0.6 p0.7 adc_in0 cp_out_a p1.0 adc_in1 cp_outa_a p1.1 adc_in2 clkout0 p1.2 pca_ch0_a adc_in3 p1.3 pca_ch1_a p1.4 gpio02 pca_ch0_b p1.5 gpio03 pca_eci_a p1.6 timer_ct_a gpio04 p1.7 timer_ct_b gpio01 p2.1 gpio00 wakeup1 uart_rts_a uart_rts_sys i2c_sda_ezr uart_cts_a uart_cts_sys i2c_scl_ezr cp_pos_a cp_neg_a epca_ch0_motor epca_ch2_motor epca_ch4_motor epca_ch1_motor epca_ch5_motor udpbus_sda_a epca_ch3_motor udpbus_scl_a 400 w cesar chavez austin, tx 78701 400 w cesar chavez austin, tx 78701 400 w cesar chavez austin, tx 78701 mh r86 0 r121 0 r75 0 r83 0 r114 0 r106 0 r89 0 r99 0 r112 0 r111 0 r79 0 r71 0 j24 port 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 tp15 c2ck r116 0 js12 jumper shunt r115 0 r117 0 r68 0 r98 0 tp14 c2d r107 0 j23 5x2 shrouded header debug 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 js13 jumper shunt r113 0 r119 0 r77 0 r80 0 r102 0 r87 0 r64 1k c28 0.1uf j26 port 2 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 r84 0 r90 0 r81 0 r96 0 r85 0 r76 0 r36 0 c30 1uf r88 0 u11 c8051f850 nc 1 p0.2 2 p0.1 / agnd 3 p0.0 / vref 4 gnd 5 vdd 6 /rst / c2ck 7 c2d / p2.0 8 p1.7 9 p1.6 10 p1.5 11 p2.1 12 nc 13 p1.4 14 p1.3 15 p1.2 16 p1.1 17 p1.0 18 p0.7 19 p0.6 20 p0.5 21 p0.4 22 p0.3 23 nc 24 r72 0 mh r66 0 r103 0 j25 port 1 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 r101 0 r109 0 r110 0 mh r65 0 r70 0 r78 0 r63 1k j35 ebid i2c 1 1 3 3 2 2 4 4 r91 0 r37 0 mh r73 0 r67 0 r104 0 figure 14. c8051f850 udp mcu card schematic (revision 200) (1 of 5)
c8051f850-dk-ug rev. 0.3 21 5 5 4 4 3 3 2 2 1 1 power test points user interface adc0.9 / p1.1 adc0.10 / p1.2 adc0.12 / p1.4 adc0.13 / p1.5 silk arrow indicates current flow vref / p0.0 vdd pre-measure gnd agnd vdd_pm +3.3v_vreg pwr_5.0v_bulk usb_5.0v pwr_vdd_out vdd vdd vdd_pm vdd debug_5.0v +3.3v_vreg vdd_pm vdd_pm vdd_pm vdd_pm vref /rst p1.0 p1.1 p1.7 p2.1 p1.2 adc0.9 adc0.10 adc0.12 adc0.13 p0.0 p0.1 adc0.9 adc0.10 adc0.12 adc0.13 p1.1 p1.2 p1.4 p1.5 vref title size document number rev date: sheet of 400 w cesar chavez austin, tx 78701 upmu-f850 2.0 c8051f850 mcu board b 25 friday, may 17, 2013 title size document number rev date: sheet of 400 w cesar chavez austin, tx 78701 upmu-f850 2.0 c8051f850 mcu board b 25 friday, may 17, 2013 title size document number rev date: sheet of 400 w cesar chavez austin, tx 78701 upmu-f850 2.0 c8051f850 mcu board b 25 friday, may 17, 2013 tp5 vdd c37 4.7uf r11 1k s1 p1.7 d6 15v ds9 blue power s5 reset c36 4.7uf r95 1k j32 vref/agnd 1 3 5 2 4 6 tp8 gnd sw1 sw_slide_2pos vdd select 1 2 3 r15 750 j6 power jack power 3 2 1 c6 0.1uf s2 p2.1 r13 10k 1 3 2 r19 1.5k d7 stps140z tp3 reset c7 4.7uf r16 750 tp16 vdd_pm j34 analog header 1 3 5 2 4 6 c38 0.1uf r25 100k tp9 gnd tp17 gnd js2 jumper shunt r94 1k ds5 red p1.0 js14 jumper shunt r9 1k d3 stps140z js1 jumper shunt js3 jumper shunt c20 0.01uf js15 jumper shunt tp10 gnd ds6 red p1.1 tp18 gnd js4 jumper shunt d4 stps140z j27 port 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 js5 jumper shunt d5 stps140z tp11 gnd jp2 jumper imeasure u6 lp2989-3.3v byp 1 nc 2 gnd 3 input 4 output 5 sense 6 error 7 sdn 8 js6 jumper shunt figure 15. c8051f850 udp mcu card schematic (revision 200) (2 of 5)
c8051f850-dk-ug 22 rev. 0.3 5 4 3 2 1 enables switch between mcu card com and motherboard com. vio_com vio_com vdd_com vdd_com vio_com pwr_3.3v_bulk usb_5.0v vdd_pm vdd_com mcu_rx mcu_tx uart_vcp_en vcp_rx vcp_tx mcu_rx mcu_tx uart_sys_en uart_rx_sys uart_tx_sys vcp_rx vcp_tx p0.4 p0.5 mcu_tx mcu_rx r4 1k js11 jumper shunt c16 4.7uf c12 0.1uf r118 1m ds10 red com tp12 vcom rts c10 0.1uf c19 0.1uf ni r22 0 c13 0.1uf j5 usb type mini b com port +v d- d+ id gnd sh sh c17 1uf r20 10k u5 74avc4t245 1dir 2 vcca 1 2b1 11 1a2 5 2a1 6 2a2 7 gnd 8 1oe 15 2oe 14 1b1 13 1b2 12 2b2 10 gnd 9 2dir 3 1a1 4 vccb 16 l1 0.68uh ni tp13 vcom cts c11 0.1uf c18 0.1uf u2 cp2103 vdd 6 vio 5 regin 7 gnd 2 reset 9 susp 11 susp 12 vbus 8 d+ 3 d- 4 cts 22 rts 23 dsr 26 rxd 24 dtr 27 txd 25 dcd 28 ri 1 gpio.3 16 gpio.2 17 gpio.1 18 gpio.0 19 epad 29 nc 10 nc 13 nc 14 nc 15 nc 20 nc 21 d1 sp0503baht j7 com 1 3 5 2 4 6 c3 1uf js10 jumper shunt c15 0.1uf u4 74avc4t245 1dir 2 vcca 1 2b1 11 1a2 5 2a1 6 2a2 7 gnd 8 1oe 15 2oe 14 1b1 13 1b2 12 2b2 10 gnd 9 2dir 3 1a1 4 vccb 16 r21 10k r122 750 c4 0.1uf js9 jumper shunt figure 16. c8051f850 udp mcu card schematic (revision 200) (3 of 5)
c8051f850-dk-ug rev. 0.3 23 5 5 4 4 3 3 2 2 1 1 electronic board identification (ebid) pwr_sys_bulk pwr_sys_bulk c2_clk_b c2_dat_b c2_clk_b c2_dat_b pca_eci_a pca_ch0_a spi_sck_ezr spi_miso_ezr spi_mosi_ezr spi_nss0_ezr gpio00 gpio01 gpio02 gpio03 gpio04 pca_ch1_a wakeup1 wakeup0 ext_int0 ext_int1 uart_rx_sys udpbus_sda_a udpbus_scl_a timer_ct_a timer_ct_b pca_ch0_b i2c_scl_ezr i2c_sda_ezr uart_tx_a uart_rx_a uart_rts_a uart_cts_a uart_tx_sys uart_rts_sys uart_cts_sys clkout0 gpio05 gpio06 title size document number date: sheet of 400 w cesar chavez austin, tx 78701 upmu-f850 c8051f850 mcu board b 45 friday, may 17, 2013 title size document number date: sheet of 400 w cesar chavez austin, tx 78701 upmu-f850 c8051f850 mcu board b 45 friday, may 17, 2013 title size document number date: sheet of 400 w cesar chavez austin, tx 78701 upmu-f850 c8051f850 mcu board b 45 friday, may 17, 2013 u1 c8051f990 p0.1_agnd 1 gnd 3 vdd 4 rst_c2ck 5 p2.7_c2d 6 p1.7 7 p1.6 8 p0.2 20 p1.1_cpo- 13 p1.0_cpo+ 14 p1.3 10 p1.5 9 p1.2 11 p0.3 19 p0.7_iref 15 p0.6_convvstr 16 p0.0_vref 2 rx_p0.5 17 tx_p0.4 18 gnd epad gnd 12 c2 0.1uf r46 0 ni j1 udp mcu h1 udp dc header lptimer_out_a 100 gnd 1 lptimer_in_a 99 usart_tx_a 2 lin_rx_b 98 usart_rx_a 3 lin_tx_b 97 usart_rts_a 4 can_rx_a 96 usart_cts_a 5 can_tx_a 95 usart_uclk_a 6 ext_dma_trig1 94 can_tx_b 7 ext_dma_trig0 93 can_rx_b 8 ext_dac_trig1 92 spi_sck_a 9 ext_dac_trig0 91 spi_miso_a 10 ext_adc_trig1 90 spi_mosi_a 11 ext_adc_trig0 89 spi_nss0_a 12 ext_int1 88 spi_nss1_a 13 ext_int0 87 spi_nss2_a 14 wakeup1 86 spi_nss3_a 15 wakeup0 85 usart_tx_b 16 port_match1 84 usart_rx_b 17 port_match0 83 usart_rts_b 18 gpio15 82 usart_cts_b 19 gpio14 81 usart_uclk_b 20 gpio13 80 epca_eci_a 21 gpio12 79 epca_ch0_a 22 gpio11 78 epca_ch1_a 23 gpio10 77 epca_ch2_a 24 gpio09 76 epca_ch3_a 25 gpio08 75 epca_ch4_a 26 gpio07 74 ecpa_ch5_a 27 gpio06 73 lin_tx_a 28 gpio05 72 lin_rx_a 29 gpio04 71 pca_eci_a 30 gpio03 70 pca_ch0_a 31 gpio02 69 pca_ch1_a 32 gpio01 68 pca_eci_b 33 gpio00 67 pca_ch0_b 34 clkout0 66 pca_ch1_b 35 i2sin_dout_a 65 i2sout_dfs_a 36 i2sin_clk_a 64 i2sout_clk_a 37 i2sin_dfs_a 63 i2sout_dout_a 38 i2c_scl_b 62 i2c_sda_ezr 39 i2c_sda_b 61 i2c_sda_ezr 40 spi_nss3_ezr 60 timer_ct_a 41 spi_nss2_ezr 59 timer_ex_a 42 spi_nss1_ezr 58 timer_ct_b 43 spi_nss0_ezr 57 timer_ex_b 44 spi_mosi_ezr 56 uart_tx_a 45 spi_miso_ezr 55 uart_rx_a 46 spi_sck_ezr 54 uart_rts_a 47 uart_cts_sys 53 uart_cts_a 48 uart_rts_sys 52 uart_tx_sys 49 uart_rx_sys 51 gnd 50 r51 0 r47 0 ni r52 0 c1 1uf r3 1k jp1 conn socket 4x1 ni figure 17. c8051f850 udp mcu card schematic (revision 200) (4 of 5)
c8051f850-dk-ug 24 rev. 0.3 5 5 4 4 3 3 2 2 1 1 d c b a pwr_vdd_out pwr_5.0v_bulk pwr_sys_bulk pwr_3.3v_bulk udpbus_sda_a udpbus_scl_a c2ck c2d c2_clk_b c2_dat_b uart_vcp_en uart_sys_en adc_in0 adc_in1 adc_vref adc_in2 adc_in3 cp_out_a adc_vrefgnd cp_outa_a epca_ch0_motor epca_ch2_motor epca_ch4_motor cp_pos_a cp_neg_a epca_ch1_motor epca_ch3_motor epca_ch5_motor title size document number rev date: sheet of 400 w cesar chavez austin, tx 78701 upmu-f850 2.0 c8051f850 mcu board b 55 friday, may 17, 2013 title size document number rev date: sheet of 400 w cesar chavez austin, tx 78701 upmu-f850 2.0 c8051f850 mcu board b 55 friday, may 17, 2013 title size document number rev date: sheet of 400 w cesar chavez austin, tx 78701 upmu-f850 2.0 c8051f850 mcu board b 55 friday, may 17, 2013 j3 udp mcu h3 udp dc header $pin0 100 gnd 1 $pin2 99 pwr_vdd_in 2 $pin4 98 pwr_vdd_in 3 $pin6 97 pwr_vdd_out 4 $pin8 96 pwr_vdd_out 5 $pin10 95 pwr_radio_in 6 $pin12 94 pwr_radio_in 7 $pin14 93 pwr_radio_out 8 $pin16 92 pwr_radio_out 9 $pin18 91 pwr_io_in 10 $pin20 90 pwr_io_in 11 $pin22 89 pwr_io_out 12 $pin24 88 pwr_io_out 13 $pin26 87 pwr_io_bus 14 $pin28 86 pwr_io_bus 15 $pin30 85 pwr_aux_bus 16 $pin32 84 pwr_aux_bus 17 $pin34 83 pwr_hv1_bus 18 $pin36 82 pwr_hv1_bus 19 $pin38 81 pwr_hv2_bus 20 $pin40 80 pwr_hv2_bus 21 $pin42 79 pwr_vpp_bulk 22 $pin44 78 pwr_vpp_bulk 23 $pin46 77 pwr_5.0v_bulk 24 $pin48 76 pwr_5.0v_bulk 25 $pin50 75 pwr_5.0v_bulk 26 $pin52 74 pwr_5.0v_bulk 27 $pin54 73 pwr_3.3v_bulk 28 $pin56 72 pwr_3.3v_bulk 29 $pin58 71 pwr_3.3v_bulk 30 $pin60 70 pwr_3.3v_bulk 31 $pin62 69 pwr_sys_bulk 32 $pin64 68 pwr_sys_bulk 33 $pin66 67 gnd 34 $pin68 66 ebid_sck 35 $pin70 65 ebid_mosi 36 $pin72 64 ebid_miso 37 $pin74 63 ebid_nss 38 $pin76 62 c2_clk_a 39 $pin78 61 c2_dat_a 40 $pin80 60 c2_clk_b 41 $pin82 59 c2_dat_b 42 $pin84 58 c2_clk_c 43 $pin86 57 c2_dat_c 44 $pin88 56 c2_clk_d 45 $pin90 55 c2_dat_d 46 vcp_en 54 c2_clk_e 47 uart_sys_en 53 c2_dat_e 48 jtag_tdi_a 52 $pin97 49 jtag_tdo_a 51 gnd 50 j4 udp mcu h4 udp dc header gnd 100 gnd 1 $pin2 99 c2d_tx00_a 2 $pin4 98 c2d_tx01_a 3 $pin6 97 c2d_tx02_a 4 itm_clk 96 c2d_tx03_a 5 itm_dat3 95 c2d_tx04_a 6 itm_dat2 94 c2d_tx05_a 7 itm_dat1 93 c2d_tx06_a 8 itm_dat0 92 c2d_tx07_a 9 $pin18 91 c2d_tx08_a 10 ezr_gpio4 90 c2d_tx09_a 11 ezr_gpio3 89 c2d_tx10_a 12 ezr_gpio2 88 c2d_tx11_a 13 ezr_gpio1 87 c2d_tx12_a 14 ezr_gpio0 86 c2d_tx13_a 15 ezr_vdi 85 c2d_tx14_a 16 ezr_arssi 84 c2d_tx15_a 17 ezr_reset 83 c2d_rx00_a 18 ezr_si100x_rx 82 c2d_rx01_a 19 ezr_efit 81 c2d_rx02_a 20 ezr_dto 80 c2d_rx03_a 21 ezr_si100x_tx 79 c2d_rx04_a 22 ezr_nffs 78 c2d_rx05_a 23 ezr_nirq 77 c2d_rx06_a 24 ezr_sdn 76 c2d_rx07_a 25 gnd 75 c2d_rx08_a 26 ezrp_rx_data_out 74 c2d_rx09_a 27 ezrp_rx_clk_out 73 c2d_rx10_a 28 ezrp_tx_data_in 72 c2d_rx11_a 29 gnd 71 c2d_rx12_a 30 ezrp_clk_in 70 c2d_rx13_a 31 gnd 69 c2d_rx14_a 32 extreg_bd_a 68 c2d_rx15_a 33 extreg_out_a 67 gnd 34 extreg_sn_a 66 adc_vref 35 extreg_sp_a 65 adc_vrefgnd 36 i2v_inn_a 64 adc_in0 37 i2v_inp_a 63 adc_in1 38 gnd 62 adc_in2 39 hvda_inn_b 61 adc_in3 40 hvda_inp_b 60 gnd 41 hvda_inn_a 59 dac_ref 42 hvda_inp_a 58 dac_refgnd 43 gnd 57 dac_out0 44 cp_neg_b 56 dac_out1 45 cp_pos_b 55 dac_out2 46 cp_neg_a 54 dac_out3 47 cp_pos_a 53 gnd 48 cp_outa_a 52 idac_a 49 cp_out_a 51 idac_b 50 j2 udp mcu h2 udp dc header cmosclk_xtal2_a 100 gnd 1 cmosclk_xtal1_a 99 udpbus_sda_a 2 lcd_com7_a 98 udpbus_scl_a 3 lcd_com6_a 97 epca_eci_motor 4 lcd_com5_a 96 epca_ch0_motor 5 lcd_com4_a 95 epca_ch1_motr 6 lcd_com3_a 94 epca_ch2_motor 7 lcd_com2_a 93 epca_ch3_motor 8 lcd_com1_a 92 epca_ch4_motor 9 lcd_com0_1 91 epca_ch5_motor 10 lcd_seg39_a 90 hvgpio00 11 lcd_seg38_a 89 hvgpio01 12 lcd_seg37_a 88 hvgpio02 13 lcd_seg36_a 87 hvgpio03 14 lcd_seg35_a 86 hvgpio04 15 lcd_seg34_a 85 hvgpio05 16 lcd_seg33_a 84 hvgpio06 17 lcd_seg32_a 83 hvgpio07 18 lcd_seg31_a 82 emif_a23 19 lcd_seg30_a 81 emif_a22 20 lcd_seg29_a 80 emif_a21 21 lcd_seg28_a 79 emif_a20 22 lcd_seg27_a 78 emif_a19 23 lcd_seg26_a 77 emif_a18 24 lcd_seg25_a 76 emif_a17 25 lcd_seg24_a 75 emif_a16 26 lcd_seg23_a 74 emif_a15 27 lcd_seg22_a 73 emif_a14 28 lcd_seg21_a 72 emif_a13 29 lcd_seg20_a 71 emif_a12 30 lcd_seg19_a 70 emif_a11 31 lcd_seg18_a 69 emif_a10 32 lcd_seg17_a 68 emif_a9 33 lcd_seg16_a 67 emif_a8 34 lcd_seg15_a 66 emif_a7 35 lcd_seg14_a 65 emif_a6 36 lcd_seg13_a 64 emif_a5 37 lcd_seg12_a 63 emif_a4 38 lcd_seg11_a 62 emif_a3 39 lcd_seg10_a 61 emif_a2 40 lcd_seg09_a 60 emif_a1 41 lcd_seg08_a 59 emif_a0 42 lcd_seg07_a 58 emif_wrb 43 lcd_seg06_a 57 emif_oeb 44 lcd_seg05_a 56 emif_ale 45 lcd_seg04_a 55 emif_cs0b 46 lcd_seg03_a 54 emif_be1b 47 lcd_seg02_a 53 emif_cs1b 48 lcd_seg01_a 52 emif_be0b 49 lcd_seg00_a 51 gnd 50 figure 18. c8051f850 udp mcu card schematic (revision 200) (5 of 5)
c8051f850-dk-ug rev. 0.3 25 10. bill of materials table 7. c8051f850 udp mcu card bill of materials reference part number source description c1 c3 c17 c30 c0603x7r100-105k venkel 1 f 10 v 10% x7r 0603 c2 c4 c6 c10 c11 c12 c13 c15 c18 c28 c38 c0603x7r100-104k venkel 0.1 f 10 v 10% x7r 0603 c20 c0603x7r100-103m venkel 0.01 f 10 v 20% x7r 0603 c7 c16 c36 c37 c0603x5r6r3-475k venkel 4.7 f 6.3 v 10% x5r 0603 d1 sp0503bahtg littlefuse 300 mw 20 v tvs sot143 d3 d4 d5 d7 stps140z st semicon ductor 1.0 a 40 v schottky sod-123 d6 mmsz5245bt1 on semiconductor 15 v 500 mw 15 v 5% zener sod-123 ds5 ds6 ds10 sml-lx0603iw lumex inc red 30 ma led 0603 ds9 ltst-c190tbkt lite-on technology corp blue led 0603 j1 j2 j3 j4 fx8-100p-sv1 hirose electric udp dc header j23 5103309-1 tyco 0.1 in. 5x2 shrouded header j24 j25 j26 j27 tsw-105-07-t-d samtec 0.1 in. 5x2 header j34 1729160 phoenix contact analog header terminal block 1x6 j35 tsw-102-07-t-d samtec 0.1 in. 2x2 header j5 54819-0519 molex usb mini b j6 rapc722x switchcraft inc. power jack 5 a barrel j7 j32 tsw-103-01-l-d samtec 0.1 in. 2x3 header jp2 tsw-102-07-t-s samtec 0.1 in. 1x2 header js1 js2 js3 js4 js5 js6 js9 js10 js11 snt-100-bk-t samtec jumper shunt r118 cr0603-16w-1004f venkel 1 m ? 1/16 w 1% thickfilm 0603 r13 rv100f-30-4k1b-b10k- b301 alpha (taiwan) 10 k ? 0.03 w 30% thumbwheel potentiometer r15 r16 r122 cr0603-16w-7500f venkel 750 ? 1/10 w 1% thickfilm 0603 r19 cr0603-10w-1501f venkel 1.5 k ? 1/10 w 1% thickfilm 0603 r20 r21 cr0603-10w-103j venkel 10 k ? 1/10 w 5% thickfilm 0603
c8051f850-dk-ug 26 rev. 0.3 r22 r36 r37 r51 r52 r65 r66 r67 r68 r70 r71 r72 r73 r75 r76 r77 r78 r79 r80 r81 r83 r84 r85 r86 r87 r88 r89 r90 r91 r96 r98 r99 r101 r102 r103 r104 r106 r107 r109 r110 r111 r112 r113 r114 r115 r116 r117 r119 r121 cr0603-16w-000 venkel 0 ? 1 a thickfilm 0603 r25 cr0603-10w-104j venkel 100 k ? 1/10 w 5% thickfilm 0603 r3 r4 r9 r11 r63 r64 r94 r95 cr0603-10w-1001f venkel 1 k ? 1/10 w 1% thickfilm 0603 s1 s2 s5 evq-pad04m panasonic corp momentary tactile switch sw1 os102011ms2qn1 c&k .1 a @ 12 v slide switch u1 c8051f990-gm silicon la bs c8051f990 mcu qfn20 u11 c8051f850-a-gu silicon la bs c8051f850 mcu qsop24 u2 cp2103-gm silicon la bs cp2103 usb-to-uart bridge qfn28 u4 u5 sn74avc4t245pw ti 1.2?3.6 v translator tssop16 u6 lp2989aimm-3.3/nopb national semiconductor 500 ma ldo msop8 components not installed c19 c0603x7r100-104k venkel 0.1 f 10 v 10% x7r 0603 not installed (ni) jp1 ssq-104-23-t-s samtec conn socket 4x1 not installed (ni) js12 js13 js14 js15 snt-100-bk-t samtec jumper shunt not installed (ni) l1 nlv25t-r68j-pf tdk 0.68 h 300 ma 5% gp not installed (ni) r46 r47 cr0603-16w-000 venkel 0 ? 1 a thickfilm 0603 not installed (ni) table 7. c8051f850 udp mcu card bill of materials (continued) reference part number source description
c8051f850-dk-ug rev. 0.3 27 a ppendix ?mcu c ard h eader p in d escriptions table 8. c8051f850 mcu card h1 pin descriptions (j1) mcu card pin signal name description c8051f850 pin / signal 1gnd 2 usart_tx_a 3 usart_rx_a 4 usart_rts_a 5 usart_cts_a 6 usart_uclk_a 7 can_tx_b 8 can_rx_b 9 spi_sck_a spi a clock 10 spi_miso_a spi a master-in, slave-out 11 spi_mosi_a spi a master-out, slave-in 12 spi_nss0_a spi a slave select 0 13 spi_nss1_a spi a slave select 1 14 spi_nss2_a spi a slave select 2 15 spi_nss3_a spi a slave select 3 16 usart_tx_b usart b transmit 17 usart_rx_b usart b receive 18 usart_rts_b usart b hardware handshaking 19 usart_cts_b usart b hardware handshaking 20 usart_uclk_b usart b clock 21 epca_eci_a epca a external clock input 22 epca_ch0_a 23 epca_ch1_a 24 epca_ch2_a 25 epca_ch3_a 26 epca_ch4_a 27 epca_ch5_a 28 lin_tx_a 29 lin_rx_a 30 pca_eci_a pca a external clock input p1.6 31 pca_ch0_a p1.3 32 pca_ch1_a p1.4 33 pca_eci_b pca b external clock input 34 pca_ch0_b p1.5 35 pca_ch1_b 36 i2sout_dfs_a i 2 s a transmitter word sync (ws)
c8051f850-dk-ug 28 rev. 0.3 37 i2sout_clk_a i 2 s a transmitter clock (sck) 38 i2sout_dout_a i 2 s a transmitter data (sd) 39 i2c_sda_ezr ezradio i 2 c data p0.6 40 i2c_scl_ezr ezradio i 2 c clock p0.7 41 timer_ct_a p1.6 42 timer_ex_a 43 timer_ct_b p1.7 44 timer_ex_b 45 uart_tx_a uart a transmit p0.4 46 uart_rx_a uart a receive p0.5 47 uart_rts_a uart a hardware handshaking p0.6 48 uart_cts_a uart a hardware handshaking p0.7 49 uart_tx_sys system uart transmit p0.4 50 gnd 51 uart_rx_sys system uart receive p0.5 52 uart_rts_sys system uart hardware handshaking p0.6 53 uart_cts_sys system uart hardware handshaking p0.7 54 spi_sck_ezr ezradio spi clock p0.0 55 spi_miso_ezr ezradio spi master-in, slave-out p0.1 56 spi_mosi_ezr ezradio spi master-out, slave-in p0.2 57 spi_nss0_ezr ezradio spi slave select 0 p0.3 58 spi_nss1_ezr ezradio spi slave select 1 59 spi_nss2_ezr ezradio spi slave select 2 60 spi_nss3_ezr ezradio spi slave select 3 61 i2c_sda_b i 2 c b data 62 i2c_scl_b i 2 c b clock 63 i2sin_dfs_a i 2 s a receiver word sync (ws) 64 i2sin_clk_a i 2 s a receiver clock (sck) 65 i2sin_dout_a i 2 s a receiver data (sd) 66 clkout0 clock p1.2 67 gpio00 general purpose i/o 0 p2.1 68 gpio01 general purpose i/o 1 p1.7 69 gpio02 general purpose i/o 2 p1.4 70 gpio03 general purpose i/o 3 p1.5 71 gpio04 general purpose i/o 4 p1.6 72 gpio05 general purpose i/o 5 p0.0 73 gpio06 general purpose i/o 6 p0.1 table 8. c8051f850 mcu card h1 pin descriptions (j1) (continued) mcu card pin signal name description c8051f850 pin / signal
c8051f850-dk-ug rev. 0.3 29 74 gpio07 general purpose i/o 7 75 gpio08 general purpose i/o 8 76 gpio09 general purpose i/o 9 77 gpio10 general purpose i/o 10 78 gpio11 general purpose i/o 11 79 gpio12 general purpose i/o 12 80 gpio13 general purpose i/o 13 81 gpio14 general purpose i/o 14 82 gpio15 general purpose i/o 15 83 port_match0 84 port_match1 85 wakeup0 mcu low-power wakeup input signal 0 p0.5 86 wakeup1 mcu low-power wakeup input signal 1 p1.5 87 ext_int0 external interrupt 0 p0.2 88 ext_int1 external interrupt 1 p0.3 89 ext_adc_trig0 external adc trigger 0 90 ext_adc_trig1 external adc trigger 1 91 ext_dac_trig0 external dac trigger 0 92 ext_dac_trig1 external dac trigger 1 93 ext_dma_trig0 external dma trigger 0 94 ext_dma_trig1 external dma trigger 1 95 can_tx_a 96 can_rx_a 97 lin_tx_b 98 lin_rx_b 99 lptimer_in_a 100 lptimer_out_a table 8. c8051f850 mcu card h1 pin descriptions (j1) (continued) mcu card pin signal name description c8051f850 pin / signal
c8051f850-dk-ug 30 rev. 0.3 table 9. c8051f850 mcu card h2 pin descriptions (j2) mcu card pin signal name description c8051f850 pin / signal 1gnd 2 udpbus_sda_a udp motherboard i 2 c a data p0.6 3 udpbus_scl_a udp motherboard i 2 c a clock p0.7 4 epca_eci_motor motor epca external clock input 5 epca_ch0_motor p1.4 6 epca_ch1_motor p0.1 7 epca_ch2_motor p1.5 8 epca_ch3_motor p0.6 9 epca_ch4_motor p1.6 10 epca_ch5_motor p0.7 11 hvgpio0 high drive i/o 0 12 hvgpio1 high drive i/o 1 13 hvgpio2 high drive i/o 2 14 hvgpio3 high drive i/o 3 15 hvgpio4 high drive i/o 4 16 hvgpio5 high drive i/o 5 17 hvgpio6 high drive i/o 6 18 hvgpio7 high drive i/o 7 19 emif_a23 emif muxed ad23m pin (non-muxed a15) 20 emif_a22 emif muxed ad22m pin (non-muxed a14) 21 emif_a21 emif muxed ad21m pin (non-muxed a13) 22 emif_a20 emif muxed ad20m pin (non-muxed a12) 23 emif_a19 emif muxed ad19m pin (non-muxed a11) 24 emif_a18 emif muxed ad18m pin (non-muxed a10) 25 emif_a17 emif muxed ad17m pin (non-muxed a9) 26 emif_a16 emif muxed ad16m pin (non-muxed a8) 27 emif_a15 emif muxed ad15m pin (non-muxed a7) 28 emif_a14 emif muxed ad14m pin (non-muxed a6) 29 emif_a13 emif muxed ad13m pin (non-muxed a5) 30 emif_a12 emif muxed ad12m pin (non-muxed a4) 31 emif_a11 emif muxed ad11m pin (non-muxed a3) 32 emif_a10 emif muxed ad10m pin (non-muxed a2) 33 emif_a9 emif muxed ad9m pin (non-muxed a1) 34 emif_a8 emif muxed ad8m pin (non-muxed a0) 35 emif_a7 emif muxed ad7m pin (non-muxed d7) 36 emif_a6 emif muxed ad6m pin (non-muxed d6) 37 emif_a5 emif muxed ad5m pin (non-muxed d5)
c8051f850-dk-ug rev. 0.3 31 38 emif_a4 emif muxed ad4m pin (non-muxed d4) 39 emif_a3 emif muxed ad3m pin (non-muxed d3) 40 emif_a2 emif muxed ad2m pin (non-muxed d2) 41 emif_a1 emif muxed ad1m pin (non-muxed d1) 42 emif_a0 emif muxed ad0m pin (non-muxed d0) 43 emif_wrb emif write signal 44 emif_oeb emif output enable 45 emif_ale emif address latch enable 46 emif_cs0b emif chip select 0 47 emif_be1b emif output byte enable 1 48 emif_cs1b emif chip select 1 49 emif_be0b emif output byte enable 0 50 gnd 51 lcd_seg00_a 52 lcd_seg01_a 53 lcd_seg02_a 54 lcd_seg03_a 55 lcd_seg04_a 56 lcd_seg05_a 57 lcd_seg06_a 58 lcd_seg07_a 59 lcd_seg08_a 60 lcd_seg09_a 61 lcd_seg10_a 62 lcd_seg11_a 63 lcd_seg12_a 64 lcd_seg13_a 65 lcd_seg14_a 66 lcd_seg15_a 67 lcd_seg16_a 68 lcd_seg17_a 69 lcd_seg18_a 70 lcd_seg19_a 71 lcd_seg20_a 72 lcd_seg21_a 73 lcd_seg22_a 74 lcd_seg23_a table 9. c8051f850 mcu card h2 pin descriptions (j2) (continued) mcu card pin signal name description c8051f850 pin / signal
c8051f850-dk-ug 32 rev. 0.3 75 lcd_seg24_a 76 lcd_seg25_a 77 lcd_seg26_a 78 lcd_seg27_a 79 lcd_seg28_a 80 lcd_seg29_a 81 lcd_seg30_a 82 lcd_seg31_a 83 lcd_seg32_a 84 lcd_seg33_a 85 lcd_seg34_a 86 lcd_seg35_a 87 lcd_seg36_a 88 lcd_seg37_a 89 lcd_seg38_a 90 lcd_seg39_a 91 lcd_com0_a 92 lcd_com1_a 93 lcd_com2_a 94 lcd_com3_a 95 lcd_com4_a 96 lcd_com5_a 97 lcd_com6_a 98 lcd_com7_a 99 cmosclk_xtal1_a mcu xtal1 pin for external oscillators 100 cmosclk_xtal2_a mcu xtal2 pin for external oscillators table 9. c8051f850 mcu card h2 pin descriptions (j2) (continued) mcu card pin signal name description c8051f850 pin / signal
c8051f850-dk-ug rev. 0.3 33 table 10. c8051f850 mcu card h3 pin descriptions (j3) mcu card pin description description c8051f850 pin / signal 1gnd 2 pwr_vdd_in power input for powering the mcu card from a power source other than the udp motherboard 3 pwr_vdd_in 4 pwr_vdd_out power input for the mcu card 5 pwr_vdd_out 6 pwr_radio_in power input for powering the radio test card from a power source other than the udp motherboard 7 pwr_radio_in 8 pwr_radio_out power input for th e radio test card 9 pwr_radio_out 10 pwr_io_in power input for powering the i/o card from a power source other than the udp motherboard 11 pwr_io_in 12 pwr_io_out power input for the i/o card 13 pwr_io_out 14 pwr_io_bus connects power from the mcu card to the radio and i/o cards 15 pwr_io_bus 16 pwr_aux_bus connects power from the mcu card to the radio and i/o cards 17 pwr_aux_bus 18 pwr_hv1_bus high drive i/o power 1 19 pwr_hv1_bus 20 pwr_hv2_bus high drive i/o power 2 21 pwr_hv2_bus 22 pwr_vpp_bulk vpp programming voltage 23 pwr_vpp_bulk 24 pwr_5.0_bulk 5.0 v power from the udp motherboard 25 pwr_5.0_bulk 26 pwr_5.0_bulk 27 pwr_5.0_bulk 28 vcc_3.3v 3.3 v power from the udp motherboard 29 vcc_3.3v 30 vcc_3.3v 31 vcc_3.3v 32 pwr_sys_bulk 3.3 v power supply for ebid devices 33 pwr_sys_bulk 34 gnd 35 ebid_sck ebid spi clock 36 ebid_mosi ebid spi master-out, slave in 37 ebid_miso ebid spi master-in, slave-out
c8051f850-dk-ug 34 rev. 0.3 38 ebid_nss ebid spi slave select 39 c2_clk_a c2 interface a clock, jtag interface a tck, serial wire swclk rst/c2ck 40 c2_dat_a c2 interface a data, jtag interface a tms, serial wire swdio c2d/p2.0 41 c2_clk_b c2 interface b clock 42 c2_dat_b c2 interface b data 43 c2_clk_c c2 interface c clock 44 c2_dat_c c2 interface c data 45 c2_clk_d c2 interface d clock 46 c2_dat_d c2 interface d data 47 c2_clk_e c2 interface e clock 48 c2_dat_e c2 interface e data 49 nc no connect 50 gnd 51 jtag_tdo_a jtag interface a data out (tdo), serial wire swo 52 jtag_tdi_a jtag interface a data in (tdi) 53 vcp_en selects the usb-to -usart motherboard path 54 uart_sys_en selects the usb- to-usart motherboard path 55 h3_55 general purpose signal 56 h3_56 general purpose signal 57 h3_57 general purpose signal 58 h3_58 general purpose signal 59 h3_59 general purpose signal 60 h3_60 general purpose signal 61 h3_61 general purpose signal 62 h3_62 general purpose signal 63 h3_63 general purpose signal 64 h3_64 general purpose signal 65 h3_65 general purpose signal 66 h3_66 general purpose signal 67 h3_67 general purpose signal 68 h3_68 general purpose signal 69 h3_69 general purpose signal 70 h3_70 general purpose signal 71 h3_71 general purpose signal 72 h3_72 general purpose signal 73 h3_73 general purpose signal table 10. c8051f850 mcu card h3 pin descriptions (j3) (continued) mcu card pin description description c8051f850 pin / signal
c8051f850-dk-ug rev. 0.3 35 74 h3_74 general purpose signal 75 h3_75 general purpose signal 76 h3_76 general purpose signal 77 h3_77 general purpose signal 78 h3_78 general purpose signal 79 h3_79 general purpose signal 80 h3_80 general purpose signal 81 h3_81 general purpose signal 82 h3_82 general purpose signal 83 h3_83 general purpose signal 84 h3_84 general purpose signal 85 h3_85 general purpose signal 86 h3_86 general purpose signal 87 h3_87 general purpose signal 88 h3_88 general purpose signal 89 h3_89 general purpose signal 90 h3_90 general purpose signal 91 h3_91 general purpose signal 92 h3_92 general purpose signal 93 h3_93 general purpose signal 94 h3_94 general purpose signal 95 h3_95 general purpose signal 96 h3_96 general purpose signal 97 h3_97 general purpose signal 98 h3_98 general purpose signal 99 h3_99 general purpose signal 100 h3_100 general purpose signal table 10. c8051f850 mcu card h3 pin descriptions (j3) (continued) mcu card pin description description c8051f850 pin / signal
c8051f850-dk-ug 36 rev. 0.3 table 11. c8051f850 mcu card h4 pin descriptions (j4) mcu card pin description description c8051f850 pin / signal 1gnd 2 c2d_tx00_a capacitive sensing output 0 3 c2d_tx01_a capacitive sensing output 1 4 c2d_tx02_a capacitive sensing output 2 5 c2d_tx03_a capacitive sensing output 3 6 c2d_tx04_a capacitive sensing output 4 7 c2d_tx05_a capacitive sensing output 5 8 c2d_tx06_a capacitive sensing output 6 9 c2d_tx07_a capacitive sensing output 7 10 c2d_tx08_a capacitive sensing output 8 11 c2d_tx09_a capacitive sensing output 9 12 c2d_tx10_a capacitive sensing output 10 13 c2d_tx11_a capacitive sensing output 11 14 c2d_tx12_a capacitive sensing output 12 15 c2d_tx13_a capacitive sensing output 13 16 c2d_tx14_a capacitive sensing output 14 17 c2d_tx15_a capacitive sensing output 15 18 c2d_rx00_a capacitive sensing input 0 19 c2d_rx01_a capacitive sensing input 1 20 c2d_rx02_a capacitive sensing input 2 21 c2d_rx03_a capacitive sensing input 3 22 c2d_rx04_a capacitive sensing input 4 23 c2d_rx05_a capacitive sensing input 5 24 c2d_rx06_a capacitive sensing input 6 25 c2d_rx07_a capacitive sensing input 7 26 c2d_rx08_a capacitive sensing input 8 27 c2d_rx09_a capacitive sensing input 9 28 c2d_rx10_a capacitive sensing input 10 29 c2d_rx11_a capacitive sensing input 11 30 c2d_rx12_a capacitive sensing input 12 31 c2d_rx13_a capacitive sensing input 13 32 c2d_rx14_a capacitive sensing input 14 33 c2d_rx15_a capacitive sensing input 15 34 gnd 35 adc_vref adc volt age reference p0.0 36 adc_vrefgnd adc vref ground p0.1 37 adc_in0 p1.0
c8051f850-dk-ug rev. 0.3 37 38 adc_in1 p1.1 39 adc_in2 p1.2 40 adc_in3 p1.3 41 gnd 42 dac_vref dac voltage reference 43 dac_vrefgnd dac voltage reference ground 44 dac_out0 45 dac_out1 46 dac_out2 47 dac_out3 48 gnd 49 idac_a idac a output 50 idac_b idac b output 51 cp_out_a comparator a synchronous output p1.0 52 cp_outa_a comparator a asynchronous output p1.1 53 cp_pos_a comparator a positive input p0.2 54 cp_neg_a comparator a negative input p0.3 55 cp_pos_b comparator b positive input 56 cp_neg_b 57 gnd 58 hvda_inp_a high voltage differential am plifier a positive input 59 hvda_inn_a high voltage differential am plifier a negative input 60 hvda_inp_b high voltage differential am plifier b positive input 61 hvda_inn_b high voltage differential am plifier b negative input 62 gnd 63 i2v_inp_a current-to-voltage converter a input 0 64 i2v_inn_a current-to-voltage converter a input 1 65 extreg_sp_a external voltage regulator sp input 66 extreg_sn_a external voltage regulator sn input 67 extreg_out_a external voltage regulator out output 68 extreg_bd_a external voltage regulator base drive output 69 gnd 70 ezrp_clk_in radio test card clock input (sma connector) 71 gnd 72 ezrp_tx_data_in radio test card transmit data input (sma connector) 73 ezro_rx_clk_out radio test card receive clock output (sma connector) 74 ezrp_rx_data_out radio test card receive data output (sma connector) table 11. c8051f850 mcu card h4 pin descriptions (j4) (continued) mcu card pin description description c8051f850 pin / signal
c8051f850-dk-ug 38 rev. 0.3 75 gnd 76 ezrp_sdn radio test card peripheral shutdown 77 ezrp_nirq radio test card peripheral interrupt status 78 ezr_nffs 79 ezr_si100x_tx radio test card si100x transmit 80 ezr_dto 81 ezr_ffit 82 ezr_si100x_rx radio test card si100x receive 83 ezr_reset radio test card reset 84 ezr_arssi 85 ezr_vdi 86 ezr_gpio0 radio test card general purpose i/o 0 87 ezr_gpio1 radio test card general purpose i/o 1 88 ezr_gpio2 radio test card general purpose i/o 2 89 ezr_gpio3 radio test card general purpose i/o 3 90 ezr_gpio4 radio test card general purpose i/o 4 91 h4_91 general purpose signal 92 itm_dat0 93 itm_dat1 94 itm_dat2 95 itm_dat3 96 itm_clk 97 h4_97 general purpose signal 98 h4_98 general purpose signal 99 h4_99 general purpose signal 100 gnd table 11. c8051f850 mcu card h4 pin descriptions (j4) (continued) mcu card pin description description c8051f850 pin / signal
c8051f850-dk-ug rev. 0.3 39 c ontact i nformation silicon laboratories inc. 400 west cesar chavez austin, tx 78701 please visit the silicon labs technical support web page: http://www.silabs.com/support and register to submit a technical support request. patent notice silicon labs invests in research and development to help our cust omers differentiate in the market with innovative low-power, s mall size, analog- intensive mixed-signal soluti ons. silicon labs' extensive pat ent portfolio is a testament to our unique approach and world-clas s engineering team. silicon laboratories and silicon labs are trademarks of silicon laboratories inc. other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. the information in this document is believed to be accurate in all respects at the time of publ ication but is subject to change without notice. silicon laboratories assumes no responsibility for errors and om issions, and disclaims responsibi lity for any consequences resu lting from the use of information included herein. ad ditionally, silicon laboratorie s assumes no responsibility for the functioning of und escribed features or parameters. silicon laboratories reserves the right to make changes without further notice . silicon laboratories makes no wa rranty, rep- resentation or guarantee regarding the suitability of its products for any particular purpose, nor does silicon laboratories as sume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including wi thout limitation conse- quential or incidental damages. silicon laborat ories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of t he silicon laboratories product could create a s ituation where per- sonal injury or death may occur. should buyer purchase or us e silicon laboratories products for any such unintended or unauthor ized ap- plication, buyer shall indemnify and hold silicon laboratories harmles s against all claims and damages.
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